Specifies the addressing mode, that is how out-of-range texture
coordinates are handled. addressMode is an array of size three whose first,
second, and third elements specify the addressing mode for the first, second, and
third texture coordinates, respectively; the addressing mode is equal to either
cudaAddressModeClamp, in which case out-of-range texture coordinates are
clamped to the valid range, or cudaAddressModeWrap, in which case out-of range
texture coordinates are wrapped to the valid range;
cudaAddressModeWrap is only supported for normalized texture coordinates;
Maximum number of 32-bit registers available to a thread block; this number is shared by all thread blocks simultaneously resident on a multiprocessor;
Maximum amount of shared memory available to a thread block in bytes; this amount is shared by all thread blocks simultaneously resident on a multiprocessor;
If set, the CUDA array contains an array of 2D slices
and the Depth member of CUDA_ARRAY3D_DESCRIPTOR specifies
the number of slices, not the depth of a 3D array.
This indicates that the user has called ::cudaSetDevice(),
::cudaSetValidDevices(), ::cudaSetDeviceFlags(),
::cudaD3D9SetDirect3DDevice(), ::cudaD3D10SetDirect3DDevice,
::cudaD3D11SetDirect3DDevice(), * or ::cudaVDPAUSetVDPAUDevice() after
initializing the CUDA runtime by calling non-device management operations
(allocating memory and launching kernels are examples of non-device
management operations).
Depth is the depth of the CUDA array (in elements); the CUDA array is
one-dimensional if height and depth are 0, two-dimensional if depth is
0, and three-dimensional otherwise;
Height is the height of the CUDA array (in elements); the CUDA array is
one-dimensional if height and depth are 0, two-dimensional if depth is
0, and three-dimensional otherwise;
The maximum number of 32-bit registers available to a thread block; this number is shared by all thread blocks simultaneously resident on a multiprocessor;
The maximum amount of shared memory available to a thread block in bytes; this amount is shared by all thread blocks simultaneously resident on a multiprocessor;
xsize and ysize, the logical width and height of the, are equivalent to the
width and height extent parameters provided by the programmer during allocation
xsize and ysize, the logical width and height of the, are equivalent to the
width and height extent parameters provided by the programmer during allocation